In communications applications, it is often desirable to use multiphase modulation techniques to increase bandwidth efficiency in telephone and satellite data communications to transmit binary data as multiple bit symbols and in particular quadrature phase shift keying (QPSK) modulation. However, when using QPSK modulation in data communications terminals, there is often a requirement to limit the spectral characteristics of the radio frequency (RF) modulated signal to reduce intersymbol interference. As is known in the art there are several filtering techniques to shape a baseband signal, wherein a digital signal which is separated into two data streams, an in-phase signal and a quadrature phase signal, also referred to as the quadrature signal, before RF modulation.
Conventional techniques for implementing filters include square root raised cosine (SRRC) filters which provide outputs having data samples generated at a frequency Fda which is equivalent to a digital to analog converter clock rate. Typical filter circuits include a tapped delay line filter having filter taps spaced at 1/(Fda) in time. Inputs bits come in at a symbol rate (Rs). Typically the filter coefficients are chosen so that a response to an impulse signal is the SRRC characteristic waveform in the time domain. To provide a baseband signal for modulating a radio frequency (RF) carrier, an impulse signal is input into the filter once per symbol.
This impulse signal consists of the value +1 (for a data “0”) or −1 (for a data “1”) followed by several samples of value 0. In a typical filter most of the multipliers are multiplying their coefficient by the value 0, and are therefore not being used. This adds digital logic that is not necessarily required.
In communication applications, low cost and compact size are important considerations. Digital filters such as those described above are often implemented as field programmable gate arrays (FPGAs) and application specific integrated circuits (ASICs).
Reducing the required circuitry to implement a particular filter can reduce the cost and size of the filter.
It would, therefore, be desirable to reduce the size and cost of the digital logic for implementing the baseband filter including reducing the volume of circuitry dedicated to the storage of coefficient values for producing the filtered baseband signal.